A single conversion start signal (CONVST) places both track/ holds into hold simultaneously and initiates conversion on both inputs. The BUSY signal indicates the end of conversion, and at this time the conversion results for both channels are available to be read. The first read after a conversion accesses the result from VA1 or VB1, while the second read accesses the result from VA2 or VB2, depending on whether the multiplexer select A0 is low or high, respectively. Data is read from the part via a 12-bit parallel data bus with standard CS and RD signals.
In addition to the traditional dc accuracy specifications such as linearity, full-scale and offset errors, the part is also specified for dynamic performance parameters including harmonic distortion and signal-to-noise ratio.
The AD7862AR-10 is fabricated in Analog Devices' Linear Compatible CMOS (LC2MOS) process, a mixed technology process that combines precision bipolar circuits with low power CMOS logic. It is available in 28-lead SSOP, SOIC and DIP.
Feature
- Two Fast 12-Bit ADCs
- Four Input Channels
- Simultaneous Sampling & Conversion
- 4 µs Throughput Time
- Single Supply Operation
- High Speed Parallel Interface
- Low Power, 60 mW typ
- Selection of Input Ranges:±10 V for AD7862-10±2.5 V for AD7862-30 V to 2.5 V for AD7862-2
- Power Saving Mode, 50 µW typ
- Overvoltage Protection on Analog Inputs
- 14-Bit Pin Compatible Upgrade (AD7863)
