Altera’s 28-nm Stratix® V FPGAs include innovations such as an enhanced core architecture, integrated transceivers up to 28.05 gigabits per second (Gbps), and a unique array of integrated hard intellectual property (IP) blocks. With these innovations, Stratix V FPGAs deliver a new class of application-targeted devices optimized for:
• Bandwidth-centric applications and protocols, including PCI Express® (PCIe®) Gen3
• Data-intensive applications for 40G/100G and beyond
• High-performance, high-precision digital signal processing (DSP) applications Stratix V devices are available in four variants (GT, GX,
GS, and E), each targeted for a different set of applications. For higher volume production, you can prototype with Stratix V FPGAs and use the low-risk, low-cost path to HardCopy® V ASICs.
Feature
Technology
• 28-nm TSMC process technology
• 0.85-V or 0.9-V core voltageLow-power serial transceivers
• 28.05-Gbps transceivers on Stratix V GT devices
• Electronic dispersion compensation (EDC) for XFP, SFP+, QSFP, CFP optical module support
• Adaptive linear and decision feedback equalization
• Transmitter pre-emphasis and de-emphasis
• Dynamic reconfiguration of individual channels
• On-chip instrumentation (EyeQ non-intrusive data eye monitoring)
Backplane capability
• 600-Megabits per second (Mbps) to 12.5-Gbps data rate capability General-purpose I/Os (GPIOs)
• 1.6-Gbps LVDS• 1,066-MHz external memory interface
• On-chip termination (OCT)
• 1.2-V to 3.3-V interfacing for all Stratix V devices
