The NBSG53AMNG is a SiGe Selectable Differential Clock and Data D Flip-Flop/Clock Divider with reset and OLS*. This is a part of the GigaComm family of high performance Silicon Germanium products. A strappable control pin is provided to select between the two functions. The NBSG53A is a device with data, clock, OLS*, reset and select inputs. Differential inputs incorporate internal 50R termination resistors and accept NECL (Negative ECL), PECL (Positive ECL), LVCMOS/LVTTL, CML or LVDS. The OLS* input is used to program the peak-to-peak output amplitude between 0 and 800mV in five discrete steps. The RESET and SELECT inputs are single-ended and can be driven with either LVECL or LVCMOS/LVTTL input levels. Data is transferred to the outputs on the positive edge of the clock. The differential clock inputs of the NBSG53A allow the device to also be used as a negative edge triggered device.
Feature
- 45ps typical Rise and fall times (OLS = FLOAT)
- DIV/2 Mode (active with select low)
- DFF Mode (active with select high)
- Selectable swing PECL output with operating range - VCC = 2.375 to 3.465V with VEE = 0V
- Selectable swing NECL output
- Selectable output level (0V, 200, 400, 600 or 800mV peak-to-peak output)
- 50 Internal input termination resistors on all differential inputs