The M48Z58/Y ZEROPOWERRAM is an 8 Kbit x 8 non-volatile static RAM that integrates power-fail deselect circuitry and battery control logic on a single die. The monolithic chip is available in two special packages to provide a highly integrated battery-backed memory solution.
The M48Z58/Y is a non-volatile pin and function equivalent to any JEDEC standard 8 K x 8 SRAM. It also easily fits into many ROM, EPROM, and EEPROM sockets, providing the non-volatility of PROMs without any requirement for special WRITE timing or limitations on the number of WRITEs that can be performed. The 28-pin, 600 mil DIP CAPHAThouses the M48Z58/Y silicon with a long life lithium button cell in a single package. The 28-pin, 330 mil SOIC provides sockets with gold plated contacts at both ends for direct connection to a separate SNAPHAThousing containing the battery. The unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process. Insertion of the SNAPHAT housing after reflow prevents potential battery damage due to the high temperatures required for device surface-mounting. The SNAPHAT housing is keyed to prevent reverse insertion. The SOIC and battery packages are shipped separately in plastic anti-static tubes or in tape & reel form. For the 28-lead SOIC, the battery package (e.g., SNAPHAT) part number is “M4Z28-BR00SH1”.
Feature
- Integrated,ultralowpowerSRAM,power-failcontrolcircuit,andbattery
- READcycletimeequalsWRITEcycletime
- Automaticpower-failchipdeselectandWRITEprotection
- WRITEprotectvoltages:(VPFD=power-faildeselectvoltage)
- M48Z58:VCC=4.75to5.5V;4.5V≤VPFD≤4.75V
- M48Z58Y:VCC=4.5to5.5V;4.2V≤VPFD≤4.5V
- Self-containedbatteryintheCAPHATDIPpackage
- Packagingincludesa28-leadSOICandSNAPHATtop(tobeorderedseparately)
- SOICpackageprovidesdirectconnectionforaSNAPHATtopwhichcontainsthebattery
- PinandfunctioncompatiblewithJEDECstandard8Kbitx8SRAMs
- RoHScompliant
- Lead-freesecondlevelinterconnect
