The ACT4 1 family of field programmable gate aays (FPGAS) offers a variety of packagc, speed, and application combinations. Derices are implemented in silicon gate. 1.2-micron or 2-micron two-level: metalCMOS, and they employ Acte's PLICETM antfiuse technology. The unique archicure ofiers gate aray fobility, high performance, and instant turmaround through user programming Device uiliation is tplially 95% of available logie modukes.
ACT 1 devices also provide system designers with unique on-chip diagnostie probe capabilities, llowing convenient testing and debugging Additional features inchude anon-chip clock driver with a hardwired distnbution network. The networt pronides eficient clock distribution with minimum skew.The user-definable IOs are capable of drving at both TIL. and CMOS drive levels. Arailable packages include plastic and ceramic J-leaded chip carriers, ceramic and plastic
quad flatpacds, and ceramic pin grid array. A security fuse may be programmed to disable al further programming and to proteet the design from being copied or reverse engineered.
Feature
●Replaces up to 53 TTL Packages
●Replaces up to 17 20-Pin PALIM Packages
●Design Library with over 250 Functions
●Gate Array Architecture Allows Completely Automatic Place and Route
●Up to 547 Programmable Logic Modules
●Up to273 Flip-Flops
●Fip-Flop Toggle Ratcs to 100 MHz
●Two In-Circuit Digostic Probe Pins Support Speed Analysis to 50 MHz
●BuiltIn High Speed Clock Distribution Network
●I/O Drive to4 mA
●Nonrolatile, User Programmable
●Logic Fully Tested Prior to Shipment
