The 74LVCH16374APVG8 16-bit edge-triggered D-type register is ideal for use as a buffer register for data synchronization and storage. Flow-through organization of signal pins simplifies layout. All pins of the 74LVCH16374APVG8 can be driven from either 3.3V or 5V devices which allows the use of this device as a translator in a mixed 3.3V/5V supply system. The 74LVCH16374APVG8 has "bus-hold" which prevents floating inputs and eliminates the need for pull-up/down resistors. The 74LVCH16374APVG8 operates at -40C to +85C
Feature
- Typical tSK(o) (Output Skew) < 250ps
- ESD > 2000V per MIL-STD-883, Method 3015
- > 200V using machine model (C = 200pF, R = 0)
- VCC = 3.3V ± 0.3V, Normal Range
- VCC = 2.7V to 3.6V, Extended Range
- CMOS power levels (0.4 uW typ. static)
- All inputs, outputs, and I/O are 5V tolerant
- Supports hot insertion
- Available in 48 pin SSOP and TSSOP packages