Feature
- SPI-compatible Serial Bus Interface
- Dual/Quad I/O Instruction Provides Increased Throughput up to 432MHz
- Supported Extended SPI, Dual I/O and Quad I/O Protocols
- Execute-in-place mode for all three Protocols, Configurable Via Volatile or Non-volatile Registers
- PROGRAM/ERASE SUSPEND Operations
- Continuous read of entire memory via a single command, fast read, quad or dual output fast read
- Flexible to Fit Application, Configurable Number of Dummy Cycles, Output Buffer Configurable
- Software Reset
- 64-byte, User-lockable, One-time Programmable (OTP) Dedicated Area
- Subsector erase 4kb uniform granularity blocks, Sector erase 64kb uniform granularity blocks
- Hardware Write Protected Area Size Defined by Five Non-volatile Bits (BP0/BP1/BP2/BP3/TB)
- JEDEC-standard 2-byte Signature (BA18h)
- Unique ID Code - 17 RO Bytes, Two Extended Device ID Bytes to Identify Device Factory options
- Minimum 100,000 ERASE Cycles per Sector
- More Than 20 Years Data Retention
Applications
Embedded Design & Development