GS81280Z18GT-250I

GSI Technology NBT SRAMs are 144Mbit and 288Mbit Synchronous Static SRAMs that allow utilization of all available bus bandwidth. The SRAMs achieve this by eliminating the need to insert deselect cycles when the device is switched from read to write cycles. The devices' simplified interface is designed to use a data bus's maximum bandwidth. Because it is a synchronous device, address, data inputs, and read/write control inputs are captured on the rising edge of the input clock. Burst order control (LBO) must be tied to a power rail for proper operation. Asynchronous inputs include the Sleep mode enable (ZZ) and Output Enable. Output Enable can be used to override the synchronous control of the output drivers and turn the RAM's output drivers off at any time. The NBT devices are ideal for military, industrial, networking, automotive, and medical imaging applications.