·Stacked device(two 512Mb die)
·SPI-compatible serial bus interface
·Single and double transfer rate(STR/DTR)
·Clock frequency
-166MHz(MAX) for all protocols in STR
-90MHz(MAX)for all protocols in DTR
·Dual/quad I/O commands for increased through-
put up to 90 MB/s
·Supported protocols:Extended,Dual and Quad I/O both STR and DTR
·Execute-in-place(XIP)
·PROGRAM/ERASE SUSPEND operations
·Volatile and nonvolatile configuration settings
·Software reset
·Additional reset pin for selected part numbers
·3-byte and 4-byte address modes-enable memory access beyond 128Mb
·Dedicated 64-byte OTP area outside main memory
-Readable and user-lockable
·Erase capability
-Die erase
-Sector erase 64KB uniform granularity
-Subsector erase 4KB,32KB granularity
·Erase performance:400KB/sec(64KB sector)
·Erase performance:80KB/sec(4KB sub-sector)
·Program performance:2MB/sec
·Security and write protection
-Volatile and nonvolatile locking and software write protection for each 64KB sector
-Nonvolatile configuration locking
-Password protection
-Hardware write protection:nonvolatile bits
(BP[3:0]and TB)define protected area size-Program/erase protection during power-up
-CRC detects accidental changes to raw data
·Electronic signature
-JEDEC-standard 3-byte signature(BB21h)
-Extended device ID:two additional bytes identify device factory options
·JESD47H-compliant
-Minimum 100,000 ERASE cycles per sector
-Data retention:20 years(TYP)
(Picture:Pinout / Diagram)
